The netX 100 and netX 500 are highly integrated network controller chips with a system architecture optimized for communication and maximum data throughput. The netX 100 offers three individually configurable communication channels as Real-Time Ethernet or fieldbus interfaces, including EtherNet/IP. The netX 500 offers four communication channels, including EtherNet/IP.
Based on the 32-bit CPU ARM 926EJ-S clocked at 200 MHz, both netX chips have memory management unit, caches, DSP, and Java extensions. The internal memory of the 144 KByte RAM and 32 KByte ROM, that contains the boot loader, is sufficient for smaller applications. For Windows CE and Linux, the memory is externally supplemented with SDRAM, SRAM or FLASH via the 32-bit memory controller. The connection to a primary Host is carried out via the Dual-Port Memory interface which is also configurable as a 16-bit extension bus for stand-alone applications. A unique feature of the netX is the central data switch and freely configurable communication channels with their own intelligence. The data switch connects the ARM CPU as well as the communication, graphic, and host controllers with the memory or the peripheral units via five data paths. The controllers thus transmit the data in parallel, contrary to the traditional sequential architecture with merely one common data bus and additional bus allocation cycles.
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